Chip-stacked package structure having leadframe with multi-piece bus bar
US7615853B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 16, 2007 |
| Grant date | Nov 10, 2009 |
| Priority date | — |
| Expiry date | Jul 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a chip-stacked package structure with leadframe having multi-piece bus bar, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provided between the plurality of inner leads arranged in rows facing each other and is vertically distant from the plurality of inner leads; a chip-stacked structure formed with a plurality of chips stacked together and provided on the die pad, the plurality of chips and the plurality of inner leads arranged in rows facing each other being electrically connected with each other; and an encapsulant provided to cover the chip-stacked structure and the leadframe; wherein the leadframe comprises at least a bus bar provided between the plurality of inner leads arranged in rows facing each other and the die pad, the bus bar being formed by multiple pieces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.