Patent · US Active

Method and device for determining an operational lifetime of an integrated circuit device

US7616021B2 · kind B2 · utility

10Cited by
4References
3Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 18, 2007
Grant dateNov 10, 2009
Priority date
Expiry dateJan 18, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/287
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An integrated circuit device includes a degradable test structure, a first external interface pin and a second external interface pin, a first conductive path coupling a first node of the degradable test structure and the first external interface pin, and a second conductive path coupling a second node of the degradable test structure and the second external interface pin. Another integrated circuit device includes a non-volatile memory device, a counter comprising an input configured to receive a first clock signal and an output to provide a count value, and control logic configured to store the count value of the counter in the non-volatile memory, whereby the non-volatile memory is externally accessible.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.