Patent · US Active

Manufacturing method of semiconductor device

US7618855B2 · kind B2 · utility

2Cited by
4References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 2, 2006
Grant dateNov 17, 2009
Priority date
Expiry dateJun 5, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/668
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A technology capable of improving the yield in a manufacturing process of a MISFET with a gate electrode formed of a metal silicide film. A gate insulating film is formed on a semiconductor substrate and silicon gate electrodes formed of a polysilicon film are formed on the gate insulating film. Then, after a silicon oxide film is formed so as to cover the silicon gate electrodes, a surface of the silicon oxide film is polished by CMP, thereby exposing the surface of the silicon gate electrodes. Subsequently, a patterned insulating film is formed on the silicon oxide film. Thereafter, an adhesion film is formed on the silicon oxide film and the insulating film. Then, a nickel film is formed on the adhesion film. Thereafter, a silicide reaction is caused to occur between the silicon gate electrode and the nickel film via the adhesion film.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.