Clock and data recovery circuit having gain control

US7620136B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Anthony Sanders · Birkenfeld, DE
• Edoardo Prete · Birkenfeld, DE

Key dates

• Filing date: Feb 3, 2006
• Grant date: Nov 17, 2009
• Expiry date: Jul 31, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/093
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A clock and data recovery circuit includes a phase detector configured to compare a phase of a data signal to a phase of a sampling clock to provide a phase error signal, a gain stage configured to apply a gain to the phase error signal to provide an amplified phase error signal, and a filter configured to filter the amplified phase error signal to provide a phase correction signal. The circuit includes a gain controller configured to adjust the gain of the gain stage in response to the phase correction signal, and a clock generator configured to provide the sampling clock based on the phase correction signal.