Inventor · Birkenfeld, DE

Edoardo Prete

24Patents
5h-index
49Co-inventors
69Inventor score

Filing activity: Oct 10, 2002 → Mar 25, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US8760946B2 Method and apparatus for memory access delay training Physics 11 Active
US9673849B1 Common mode extraction and tracking for data signaling Electricity 7 Active
US7721130B2 Apparatus and method for switching an apparatus to a power saving mode Emerging Cross-Sectional Technologies 6 Active
US9183125B2 DDR receiver enable cycle training Physics 5 Active
US9639495B2 Integrated controller for training memory physical layer interface Physics 5 Active
US7620136B2 Clock and data recovery circuit having gain control Electricity 3 Active
US10749756B2 Channel training using a replica lane Electricity 2 Active
US8782458B2 System and method of data communications between electronic devices Physics 2 Active
US7782927B2 Generating a transmission clock signal and a reception clock signal for a transceiver using an oscillator Electricity 2 Active
US10692545B2 Low power VTT generation mechanism for receiver termination Physics 1 Active
US7733815B2 Data sampler including a first stage and a second stage Electricity 1 Active
US7532695B2 Clock signal extraction device and method for extracting a clock signal from data signal Electricity 1 Expired
US7936201B2 Apparatus and method for providing a signal for transmission via a signal line Physics 0 Active
US12388490B2 Receiver equalization circuitry using variable termination and T-coil Electricity 0 Active
US6836162B2 Method and arrangement for frequency doubling Electricity 0 Expired
US12034440B2 Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links Electricity 0 Active
US10103837B2 Asynchronous feedback training Electricity 0 Active
US8553754B2 Method and apparatus for using DFE in a system with non-continuous data Electricity 0 Active
US12174769B2 Periodic receiver clock data recovery with dynamic data edge Electricity 0 Active
US11860685B2 Clock frequency divider circuit Electricity 0 Active
US11805026B2 Channel training using a replica lane Electricity 0 Active
US7405591B2 Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage Electricity 0 Active
US7420430B2 Method and arrangement for generating an output clock signal with an adjustable phase relation from a plurality of input clock signals Electricity 0 Expired
US7313211B2 Method and apparatus for phase detection Electricity 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.