Systems for testing and packaging integrated circuits

US7621761B2 · kind B2 · utility

Assignee

• Nanonexus, Inc. · US

Inventors

• Sammy Mok · Cupertino, US
• Fu Chiung Chong · Saratoga, US
• Roman Milter · San Francisco, US

Key dates

• Filing date: Jul 20, 2007
• Grant date: Nov 24, 2009
• Expiry date: Jul 20, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H05K3/4092
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.