Method of forming an electrically conductive line in an integrated circuit
US7622391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2007 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Oct 29, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure comprises providing a semiconductor structure comprising a layer of a dielectric material provided over an electrically conductive feature. An opening is formed in the layer of dielectric material. The opening is located over the electrically conductive feature and has a first lateral dimension. A cavity is formed in the electrically conductive feature. The cavity has a second lateral dimension being greater than the first lateral dimension. The cavity and the opening are filled with an electrically conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.