Semiconductor processing system with ultra low-K dielectric
US7622403B2 · kind B2 · utility
1Cited by
4References
10Claims
0Family size
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Key dates
| Filing date | Dec 19, 2006 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Jun 29, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor processing system with ultra low-K dielectric is provided including providing a substrate having an electronic circuit, forming an ultra low-K dielectric layer, having porogens, over the substrate, blocking an incoming radiation from a first region of the ultra low-K dielectric layer, evaporating the porogens from a second region of the ultra low-K dielectric layer by projecting the incoming radiation on the second region, and removing the ultra low-K dielectric layer in the first region with a developer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.