Method and device for adapting the voltage of a MOS transistor bulk
US7622983B2 · kind B2 · utility
3Cited by
7References
24Claims
0Family size
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Key dates
| Filing date | Mar 16, 2007 |
| Grant date | Nov 24, 2009 |
| Priority date | — |
| Expiry date | Mar 16, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/205
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit for biasing the bulk of a MOS transistor, including a capacitive element connecting the bulk of the MOS transistor to a source of an voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.