Semiconductor device and method of manufacturing the same
US7626215B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2006 |
| Grant date | Dec 1, 2009 |
| Priority date | — |
| Expiry date | Apr 26, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
Abstract
A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.