Memory built-in self repair (MBISR) circuits/devices and method for repairing a memory comprising a memory built-in self repair (MBISR) structure
US7627792B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2004 |
| Grant date | Dec 1, 2009 |
| Priority date | — |
| Expiry date | Oct 31, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/81
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for repairing a memory comprising a Memory Built-In Self Repair (MBISR) structure comprises the steps of detection of defective storage cells, and redundancy allocation. The redundancy allocation step is carried out in such a way that it combines a row and/or column oriented redundancy repair approach with a word oriented redundancy repair approach. A Memory Built-In Self Repair (MBISR) device comprises at least one memory (2) with row and/or column redundancy, at least one row and/or column Memory Built-In Self Repair (MBISR) circuit (3), and a word redundancy block (4). Furthermore, a distributed MBISR structure as well as dedicated Column/Row MBISR circuits (3) are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.