Yannick Martelloni
13Patents
4h-index
27Co-inventors
52Inventor score
Filing activity: Dec 13, 1999 → May 16, 2007
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6507899B1 | Interface for a memory unit | Physics | 33 | Expired |
| US7627792B2 | Memory built-in self repair (MBISR) circuits/devices and method for repairing a memory comprising a memory built-in self repair (MBISR) structure | Physics | 16 | Active |
| US6536003B1 | Testable read-only memory for data memory redundant logic | Physics | 10 | Expired |
| US7237153B2 | Integrated memory and method for testing an integrated memory | Physics | 4 | Expired |
| US7504695B2 | SRAM memory cell and method for compensating a leakage current flowing into the SRAM memory cell | Physics | 4 | Expired |
| US7738305B2 | Read-out circuit for or in a ROM memory; ROM memory and method for reading the ROM memory | Physics | 3 | Active |
| US7183816B2 | Circuit and method for switching an electrical load on after a delay | Electricity | 3 | Expired |
| US7633787B2 | ROM memory component featuring reduced leakage current, and method for writing the same | Physics | 2 | Expired |
| US7436721B2 | Supplying voltage to a bit line of a memory device | Physics | 2 | Active |
| US7508691B2 | Memory arrangement with low power consumption | Physics | 1 | Expired |
| US7366002B2 | Method and storage device for the permanent storage of data | Physics | 1 | Active |
| US7161824B2 | Method for programming a memory arrangement and programmed memory arrangement | Physics | 1 | Expired |
| US7606107B2 | Memory cell, read device for memory cell, memory assembly, and corresponding method | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.