Memory device and testing with write completion detection
US7630264B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2007 |
| Grant date | Dec 8, 2009 |
| Priority date | — |
| Expiry date | Sep 25, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus including a memory cell, a reference cell, a control unit, coupled to the memory cell and the reference cell, and configured to initiate write processes of the memory cell and the reference cell, and a detection unit, coupled to the reference cell, and configured to detect a write completion of the reference cell. Related methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.