Metal/semiconductor/metal current limiter
US7633108B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2007 |
| Grant date | Dec 15, 2009 |
| Priority date | — |
| Expiry date | Feb 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming a metal/semiconductor/metal (MSM) current limiter and resistance memory cell with an MSM current limiter. The method provides a substrate; forms an MSM bottom electrode overlying the substrate; forms a ZnOx semiconductor layer overlying the MSM bottom electrode, where x is in the range between about 1 and about 2, inclusive; and, forms an MSM top electrode overlying the semiconductor layer. The ZnOx semiconductor can be formed through a number of different processes such as spin-coating, direct current (DC) sputtering, radio frequency (RF) sputtering, metalorganic chemical vapor deposition (MOCVD), or atomic layer deposition (ALD).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.