Semiconductor device structure having enhanced performance FET device

US7635620B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Xiangdong Chen · Irvine, US
• Haining Yang · Wappingers Falls, US

Key dates

• Filing date: Jan 10, 2006
• Grant date: Dec 22, 2009
• Expiry date: May 21, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0167

Abstract

A method for making a semiconductor device structure, includes: providing a substrate; forming on the substrate: a first layer below and second layers on a gate with spacers, source and drain regions adjacent to the gate, silicides on the gate and source and drain regions; disposing a stress layer over the structure resulting from the forming step; disposing an insulating layer over the stress layer; removing portions of the insulating layer to expose a top surface of the stress layer; removing the top surface and other portions of the stress layer and portions of the spacers to form a trench, and then disposing a suitable stress material into the trench.