Stacked integrated circuit package-in-package system
US7635913B2 · kind B2 · utility
5Cited by
14References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2006 |
| Grant date | Dec 22, 2009 |
| Priority date | — |
| Expiry date | Jun 29, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked integrated circuit package-in-package system is provided including forming a substrate with a top contact, mounting a first device having a first terminal over the substrate, stacking a second device having a second terminal over the first device in an offset configuration, connecting the first terminal to the top contact below the first terminal, and connecting the second terminal to the top contact below the second terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.