MOS transistor with fully silicided gate
US7638427B2 · kind B2 · utility
7Cited by
9References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2006 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Jul 3, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/668
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An MOS transistor with a fully silicided gate is produced by forming a silicide compound in the gate separately and independently of silicide portions located in source and drain zones of the transistor. To this end, the silicide portions of the source and drain zones are covered by substantially impermeable coatings. The coatings prevent the silicide portions of the source and drain zones from increasing in volume during separate and independent formation of the gate silicide compound. The silicide gate may thus be thicker than the silicide portions of the source and drain zones.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.