Lattice-mismatched semiconductor structures on insulators
US7638842B2 · kind B2 · utility
73Cited by
134References
41Claims
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Key dates
| Filing date | Sep 7, 2005 |
| Grant date | Dec 29, 2009 |
| Priority date | — |
| Expiry date | Sep 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Monolithic lattice-mismatched semiconductor heterostructures are fabricated by bonding patterned substrates with alternative active-area materials formed thereon to a rigid dielectric platform and then removing the highly-defective interface areas along with the underlying substrates to produce alternative active-area regions disposed over the insulator and substantially exhausted of misfit and threading dislocations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.