Method of fabricating spacers and cleaning method of post-etching and semiconductor device
US7642152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2005 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Jun 5, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/976
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.