System and method for maintaining RAM command timing across phase-shifted time domains
US7644226B1 · kind B1 · utility
6Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2006 |
| Grant date | Jan 5, 2010 |
| Priority date | — |
| Expiry date | Jan 15, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1668
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one exemplary embodiment, a RAM employing system includes a RAM and a RAM controller coupled to the RAM. The RAM employing system further includes a command queue, which is configured to receive time encoded RAM commands from the RAM controller. The RAM is configured to retrieve, decode, and execute each of the time encoded RAM commands in the command queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.