Conditioning operations for memory cells
US7646625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2007 |
| Grant date | Jan 12, 2010 |
| Priority date | — |
| Expiry date | Sep 16, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the invention relates to a method for conditioning resistive memory cells of a memory array with a number of reliable resistance ranges, where each reliable resistance range corresponds to a different data state. In the method, group of at least one resistive memory cell is accessed, which group includes at least one unreliable cell. At least one pulse is applied to the at least one unreliable cell to shift at least one resistance respectively associated with the at least one unreliable cell to the highest of the reliable resistance ranges. Other methods and systems are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.