Semiconductor wafer
US7649268B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2007 |
| Grant date | Jan 19, 2010 |
| Priority date | — |
| Expiry date | Jun 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer comprises a plurality of die areas, at least a first scribe line area and at least a second scribe line area surrounding each die area, at least a first metal structure positioned in the first scribe line area, and at least a second metal structure positioned in the second scribe line area. The first metal structure comprises at least a first slot split parallel to the first scribe line area, or comprises a plurality of openings arranged in an array. The second metal structure comprises at least a second slot split parallel to the second scribe line area, or comprises a plurality of openings arranged in an array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.