Memory arrangement for message processing by a plurality of threads
US7653895B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2006 |
| Grant date | Jan 26, 2010 |
| Priority date | — |
| Expiry date | Nov 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various approaches for preparing a system for multi-thread processing of messages are disclosed. In one approach, respective portions of a message accessed by a plurality of threads are determined from a high-level language programming specification of the threads. A plurality of input elements are generated and respectively coupled to the plurality of threads. Each input element is configured to select from the message received by the input element the portion of the message accessed by the respective thread and provide each selected portion to the respective thread. A plurality of output elements are generated and configured with storage for data output by a respective thread. From a definition of an output message, a concentrator element is generated and is configured to read data from the output elements and assemble the data into an output message according to the definition of the output message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.