S-matrix technique for circuit simulation
US7660708B2 · kind B2 · utility
0Cited by
3References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2005 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Apr 24, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A methodology for combining two or more S-parameter blocks/matrices (each representing a circuit or network, or the interconnection between a circuit or network) into a single S-matrix are described. Such a matrix may be beneficially used to simulate the circuit or network represented by the multiply interconnected circuits or networks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.