Multithreading instruction scheduler employing thread group priorities
US7660969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2007 |
| Grant date | Feb 9, 2010 |
| Priority date | — |
| Expiry date | Jan 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4881
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A concurrent instruction dispatch apparatus includes a group indicator for each of a plurality of threads that indicates which one of a plurality of groups of the threads the thread belongs to. A group priority indicator for each group indicates an instruction dispatch priority relative to the other groups. Selection logic selects a thread for dispatching an instruction thereof based on the group and group priority indicators. A bifurcated scheduler includes first scheduler logic that issues instructions of the threads to an execution unit, second scheduler logic that enforces a thread scheduling policy, and an interface. A group indicator indicates which group each thread belongs to, a priority for each group, and execution information for each thread. The first scheduler logic issues the instructions based on the group priorities and group indicators, and the second scheduler logic updates the group indicators based on the instruction execution information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.