Method to remove circuit patterns from a wafer
US7666689B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2006 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Jan 12, 2027 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24C3/322
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.