Two bit U-shaped memory structure and method of making the same

US7667262B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventors

• Wei-Ming Liao · Taoyuan, TW
• Jer-Chyi Wang · Daxi District, TW

Key dates

• Filing date: Jun 15, 2008
• Grant date: Feb 23, 2010
• Expiry date: Aug 2, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/299

Abstract

A memory structure includes: a substrate; a control gate positioned on the substrate; floating gates positioned at two sides of the control gate, wherein the floating gates have a U-shaped bottom embedded in the substrate; a first dielectric layer positioned between the control gate and the substrate; a second dielectric layer positioned between the U-shaped bottom of the floating gates and the substrate; a third dielectric layer positioned between the control gate and the floating gates; a local doping region positioned around the floating gates channel; and a source/drain doping region positioned in the substrate at a side of the floating gates.