Structure and method for simultaneously determining an overlay accuracy and pattern placement error
US7667842B2 · kind B2 · utility
24Cited by
7References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 31, 2006 |
| Grant date | Feb 23, 2010 |
| Priority date | — |
| Expiry date | Feb 23, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention provides a technique for obtaining overlay error and PPE error information from a single measurement structure. This is accomplished by forming periodic sub-structures in at least two different device layers in a single measurement structure, wherein at least one segmented and one non-segmented portion is provided in the two different device layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.