Low noise JFET
US7670888B2 · kind B2 · utility
2Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2007 |
| Grant date | Mar 2, 2010 |
| Priority date | — |
| Expiry date | Apr 11, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/83
Abstract
Fashioning a low noise (1/f) junction field effect transistor (JFET) is disclosed, where multiple implants are performed to push a conduction path of the transistor away from the surface of a layer upon which the transistor is formed. In this manner, current flow in the conduction path is less likely to be disturbed by defects that may exist at the surface of the layer, thereby mitigating (1/f) noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.