Imran Khan
56Patents
8h-index
57Co-inventors
81Inventor score
Filing activity: Mar 25, 1999 → Aug 30, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6432791B1 | Integrated circuit capacitor and method | Electricity | 24 | Expired |
| US9064903B2 | Analog floating-gate memory manufacturing process implementing n-channel and p-channel MOS transistors | Electricity | 23 | Active |
| US6352887B1 | Merged bipolar and CMOS circuit and method | Electricity | 16 | Expired |
| US6861303B2 | JFET structure for integrated circuit and fabrication method | Physics | 13 | Expired |
| US6873021B1 | MOS transistors having higher drain current without reduced breakdown voltage | Electricity | 12 | Expired |
| US9269849B2 | Photovoltaic device including a back contact and method of manufacturing | Emerging Cross-Sectional Technologies | 11 | Active |
| US6751146B1 | System and method for charge restoration in a non-volatile memory device | Physics | 11 | Expired |
| US9853177B2 | Photovoltaic device including a back contact and method of manufacturing | Emerging Cross-Sectional Technologies | 9 | Active |
| US8754501B2 | Integration of precision MIM capacitor and precision thin film resistor | Electricity | 6 | Active |
| US8178915B1 | Unitary floating-gate electrode with both N-type and P-type gates | Electricity | 5 | Active |
| US6930005B2 | Low cost fabrication method for high voltage, high drain current MOS transistor | Electricity | 5 | Expired |
| US9455312B2 | Multiple depth vias in an integrated circuit | Electricity | 5 | Active |
| US8779550B2 | Analog floating-gate capacitor with improved data retention in a silicided integrated circuit | Electricity | 4 | Active |
| US7084458B1 | Semiconductor device having triple LDD structure and lower gate resistance formed with a single implant process | Electricity | 3 | Expired |
| US6706635B2 | Innovative method to build a high precision analog capacitor with low voltage coefficient and hysteresis | Electricity | 3 | Expired |
| US9202964B2 | System and method for photovoltaic device temperature control while conditioning a photovoltaic device | Emerging Cross-Sectional Technologies | 3 | Active |
| US7268394B2 | JFET structure for integrated circuit and fabrication method | Physics | 3 | Expired |
| US10276648B1 | Plasma treatment for thin film resistors on integrated circuits | Emerging Cross-Sectional Technologies | 3 | Active |
| US6939770B1 | Method of fabricating semiconductor device having triple LDD structure and lower gate resistance formed with a single implant process | Electricity | 2 | Expired |
| US8431427B2 | Photovoltaic module manufacture | Emerging Cross-Sectional Technologies | 2 | Active |
| US9608109B1 | N-channel demos device | Electricity | 2 | Active |
| US7670888B2 | Low noise JFET | Electricity | 2 | Active |
| US7279738B2 | Semiconductor device with an analog capacitor | Electricity | 2 | Expired |
| US8981445B2 | Analog floating-gate memory with N-channel and P-channel MOS transistors | Electricity | 2 | Active |
| US6958269B2 | Memory device with reduced cell size | Electricity | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.