Multi-gate field effect transistor
US7675117B2 · kind B2 · utility
8Cited by
18References
39Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 14, 2006 |
| Grant date | Mar 9, 2010 |
| Priority date | — |
| Expiry date | Aug 4, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6744
Abstract
A planar, double-gate transistor structure comprising upper and lower gate stacks that each comprises a single-phase high-K dielectric gate dielectric is disclosed. The transistor structure is particularly suitable for fully-depleted silicon-on-insulator electronics having gate-lengths less than 65 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.