Process for manufacturing a membrane of semiconductor material integrated in, and electrically insulated from, a substrate
US7678600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2008 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Aug 30, 2028 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/0116
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A process for manufacturing an integrated membrane made of semiconductor material includes the step of forming, in a monolithic body of semiconductor material having a front face, a buried cavity, extending at a distance from the front face and delimiting with the front face a surface region of the monolithic body, the surface region forming a membrane that is suspended above the buried cavity. The process further envisages the step of forming an insulation structure in a surface portion of the monolithic body to electrically insulate the membrane from the monolithic body; and the further and distinct step of setting the insulation structure at a distance from the membrane so that it will be positioned outside the membrane at a non-zero distance of separation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.