Analog capacitor and method of manufacturing the same
US7679124B2 · kind B2 · utility
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4Claims
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Key dates
| Filing date | Jul 22, 2005 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Nov 28, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An analog capacitor capable of reducing the influence of an applied voltage on a capacitance and a method of manufacturing the analog capacitor are provided. The analog capacitor includes a lower electrode which is formed on a substrate, a multi-layered dielectric layer which includes at least one oxide layer and at least one oxynitride layer which are formed of a material selected from the group consisting of Hf, Al, Zr, La, Ba, Sr, Ti, Pb, Bi and a combination thereof and is formed on the lower electrode, and an upper electrode which is formed on the multi-layered dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.