Dynamic branch prediction using a wake value to enable low power mode for a predicted number of instruction fetches between a branch and a subsequent branch
US7681021B2 · kind B2 · utility
11Cited by
1References
10Claims
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Key dates
| Filing date | Sep 28, 2006 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Mar 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3806
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor has a fetch unit and a branch execution unit. The fetch unit has a branch predictor. The branch predictor has a branch target buffer and a branch direction predictor. A wake value is a number of instruction fetches that is predicted to be performed after a fetch of a branch. Thus, for a first branch, for example, a first wake number is predicted. A low power mode of the branch predictor is enabled for a duration of the first wake value in response to hit in the branch target buffer in which the hit is in response to the first branch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.