Semiconductor device and production method thereof
US7683362B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2006 |
| Grant date | Mar 23, 2010 |
| Priority date | — |
| Expiry date | Sep 6, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to fill up the trenches, the surfaces of the trenches are demarcated by facets, and extended portions of the semiconductor mixed crystal layers are formed between bottom surfaces of second side wall insulating films and a surface of the silicon substrate, and extended portion are in contact with a source extension region and a drain extension region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.