Method for producing stackable dies
US7687311B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2008 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Dec 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method for improved semiconductor die production is provided. A preferred embodiment provides a method for creating a stackable die, the method includes providing a first substrate, and forming through-silicon vias in the first substrate. The through-silicon vias extend from a first surface of the first substrate, wherein the through-silicon vias connect to a conductive layer on the first surface of the first substrate, and wherein the conductive layer has a planar surface. The conductive layer joins to a carrier substrate with an adhesive. The method continues by joining a second substrate to a second surface of the first substrate, removing the carrier substrate, removing the adhesive layer, and patterning the conductive layer to form contact pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.