Inexpensive method of fabricating a higher performance capacitance density MIMcap integrable into a copper interconnect scheme
US7687867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2007 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Mar 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method to integrate MIM capacitors into conductive interconnect levels, with low cost impact, and high yield, reliability and performance than existing integration methods is provided. This is accomplished by recessing a prior level dielectric for MIM capacitor level alignment followed by deposition and patterning of the MIM capacitor films. Specifically, the method includes providing a substrate including a wiring level, the wiring level comprising at least one conductive interconnect formed in a dielectric layer; selectively removing a portion of the dielectric layer to recess the dielectric layer below an upper surface of the at least one conductive interconnect; forming a dielectric stack upon the at least one conductive interconnect and the recessed dielectric layer; and forming a metal-insulator-metal (MIM) capacitor on the dielectric stack. The MIM capacitor includes a bottom plate electrode, a dielectric and a top plate electrode. The bottom and top plate electrodes can comprise the same or different conductive metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.