Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
US7691747B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2007 |
| Grant date | Apr 6, 2010 |
| Priority date | — |
| Expiry date | Nov 29, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.