Patent · US Active

Stitched micro-via to enhance adhesion and mechanical strength

US7692301B2 · kind B2 · utility

0Cited by

3References

7Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Kum Leong · Jeniang, MY
Chee-Key Chung · Bukit Mertajam, MY
Kian Sin Sim · Bukit Mertajam, MY

Key dates

Filing date	May 21, 2007
Grant date	Apr 6, 2010
Priority date	—
Expiry date	Aug 17, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH05K2203/1105
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conductive material over the interfacial adhesion layer. An interfacial layer material is deposited within at the base of opening and a conductive material is placed over the interfacial material. The interfacial layer material is a material that will diffuse into the conductive material at the temperature produced by heating the materials at the base of the via opening. Heating the materials at the base of the via opening includes directing energy from a laser at the base of the opening. An integrated circuit packaging substrate includes a first layer of conductive material, and a second layer of conductive material. The integrated circuit packaging substrate also includes a via for interconnecting the first layer of conductive material and the second layer of conductive material having a base that includes an interfacial adhesion material to stitch the base of the via to a layer of circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.