Patent · US Active

Phase locked loop having reduced inherent noise

US7693247B2 · kind B2 · utility

0Cited by
2References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 26, 2005
Grant dateApr 6, 2010
Priority date
Expiry dateNov 23, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/18
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A phase locked loop having reduced inherent noise is provided. The phase locked loop comprises a controlled oscillator for outputting a periodic output signal as a result of a control signal; a feedback unit for providing at least two periodic feedback signals having a constant phase shift to each other and each depending on the output signal; a phase/frequency detector for providing difference signals each depending on a periodic input signal and at least one of the feedback signals; and a control circuit for providing the control signal to the controlled oscillator depending on the difference signals.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.