Patent · US Active

Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module

US7697322B2 · kind B2 · utility

27Cited by

3References

24Claims

0Family size

Assignees

Qimonda AG · DE
Altis Semiconductor, SNC · FR

Inventors

Rainer Leuschner · Regensburg, DE
Ulrich Klostermann · Fontainebleau, FR

Key dates

Filing date	Jul 10, 2007
Grant date	Apr 13, 2010
Priority date	—
Expiry date	Mar 25, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH10N50/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction is provided. The magnetic tunnel junction may include a free layer with a magnetization orientation that is selected by the application of a write current through the magnetic tunnel junction, and a retention layer that retains the selectable magnetization orientation of the free layer at temperatures below a retention temperature.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.