Vertically integrated field-effect transistor having a nanostructure therein

US7709827B2 · kind B2 · utility

Assignee

• Qimonda AG · DE

Inventors

• Andrew C. Graham · Sunnyvale, US
• Franz Hofmann · Munich, DE
• Wolfgang Hönlein · Unterhaching, DE
• Johannes Kretz · Birkenfeld, DE
• Franz Kreupl · Mountain View, US
• Erhard Landgraf · Dresden, DE
• Johannes Luyken · Birkenfeld, DE
• Wolfgang Rosner · Hersbruck, DE
• Thomas Schulz · Austin, US
• Michael Specht · Munich, DE

Key dates

• Filing date: Oct 29, 2003
• Grant date: May 4, 2010
• Expiry date: Oct 29, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10K85/615
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

The invention relates to a vertical integrated component, a component arrangement and a method for production of a vertical integrated component. The vertical integrated component has a first electrical conducting layer, a mid layer, partly embodied from dielectric material on the first electrical conducting layer, a second electrical conducting layer on the mid layer and a nanostructure integrated in a through hold introduced in the mid layer. A first end section of the nanostructure is coupled to the first electrical conducting layer and a second end section is coupled to the second electrical conducting layer. The mid layer includes a third electrical conducting layer between two adjacent dielectric partial layers, the thickness of which is less than the thickness of at least one of the dielectric partial layers.