Semiconductor device having a split gate structure with a recessed top face electrode
US7709874B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2007 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Jun 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.