Sensor, method, and design structure for a low-k delamination sensor
US7716992B2 · kind B2 · utility
8Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2008 |
| Grant date | May 18, 2010 |
| Priority date | — |
| Expiry date | Mar 27, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention generally relates to a design structure of a circuit design, and more particularly to a design structure of a delamination sensor for use with low-k materials. A delamination sensor includes at least one first sensor formed in a layered semiconductor structure and a second sensor formed in the layered semiconductor structure. The at least one first sensor is structured and arranged to detect a defect, and the second sensor is structured and arranged to identify an interface where the defect exists.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.