Pulsed-plasma system with pulsed sample bias for etching semiconductor substrates

US7718538B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Tae Won Kim · Dublin, US
• Kyeong-Tae Lee · Los Gatos, US
• Alexander Paterson · San Jose, US
• Valentin Todorov · Fremont, US
• Shashank Deshmukh · San Jose, US

Key dates

• Filing date: Feb 21, 2007
• Grant date: May 18, 2010
• Expiry date: May 18, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/32137
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A pulsed plasma system with pulsed sample bias for etching semiconductor structures is described. In one embodiment, a portion of a sample is removed by applying a pulsed plasma process, wherein the pulsed plasma process comprises a plurality of duty cycles. A negative bias is applied to the sample during the ON state of each duty cycle, while a zero bias is applied to the sample during the OFF state of each duty cycle. In another embodiment, a first portion of a sample is removed by applying a continuous plasma process. The continuous plasma process is then terminated and a second portion of the sample is removed by applying a pulsed plasma process.