Patent · US Active

Deep trench isolation for power semiconductors

US7723800B2 · kind B2 · utility

13Cited by

3References

16Claims

0Family size

Assignee

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC · US

Inventors

Peter Moens · Zottegem, BE
Bart Desoete · Waregem, BE

Key dates

Filing date	May 23, 2008
Grant date	May 25, 2010
Priority date	—
Expiry date	Aug 7, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/104
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An integrated power semiconductor device has an isolation structure having two or more isolation trenches, and one or more regions in between the isolation trenches, and a bias arrangement coupled to the regions to divide a voltage across the isolation structure between the isolation trenches. By dividing the voltage, the reverse breakdown voltage characteristics such as voltage level, reliability and stability can be improved for a given area of device, or for a given complexity of device, and avalanche breakdown at weaknesses in isolation structures can be reduced or avoided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.