Silicon carbide semiconductor device and method for producing the same
US7728336B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2007 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | Sep 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an SiC vertical MOSFET comprising a channel region and an n-type inverted electron guide path formed through ion implantation in a low-concentration p-type deposition film, the width of the channel region may be partly narrowed owing to implantation mask positioning failure, and the withstand voltage of the device may lower, and therefore, the device could hardly satisfy both low on-resistance and high withstand voltage. In the invention, second inverted layers (41, 42) are provided at the same distance on the right and left sides from the inverted layer (40) to be the electron guide path in the device, and the inverted layers are formed through simultaneous ion implantation using the same mask, and accordingly, the length of all the channel regions in the device is made uniform, thereby solving the problem.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.