Patent · US Active

Method for neutralizing trapped charge in a charge accumulation layer of a semiconductor structure

US7736915B2 · kind B2 · utility

0Cited by
7References
8Claims
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Key dates

Filing dateFeb 21, 2006
Grant dateJun 15, 2010
Priority date
Expiry dateSep 3, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76275
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for neutralizing trapped charges in a buried oxide layer. The method includes providing a semiconductor structure which includes (a) a semiconductor layer, (b) a charge accumulation layer on top of the semiconductor layer, and (c) a doped region in direct physical contact with the semiconductor layer, wherein the charge accumulation layer comprises trapped charges of a first sign, and wherein the doped region and the semiconductor layer form a P-N junction diode. Next, free charges are generated in the P-N junction diode, wherein the free charges are of a second sign opposite to the first sign. Next, the free charges are accelerated towards the charge accumulation layer, resulting in some of the free charges entering the charge accumulation layer and neutralizing some of the trapped charges in the charge accumulation layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.