Semiconductor manufacturing method
US7737001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2006 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Oct 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a stealth dicing process for a semiconductor device with a low dielectric constant layer, the occurrence of poor appearance such as a defective shape or discoloration in the layer is reduced or prevented as follows. A low dielectric constant layer is formed in an interlayer insulating layer formed on the main surface of a semiconductor wafer. A laser beam is focused on the inside of the wafer from the reverse side of the wafer in order to form modified regions selectively. Each modified region is formed in a way to contact, or partially get into, the low dielectric constant layer. In this formation process, the semiconductor wafer is cooled by a cooling element. This reduces or prevents discoloration of the low dielectric constant layer which might occur due to the heat of a laser beam.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.