Power configuration method for structured ASICs
US7737564B2 · kind B2 · utility
0Cited by
11References
12Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 19, 2006 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Jan 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/998
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for electrically coupling a bond pad of an integrated circuit such as a field programmable device, an application-specific integrated circuit, or a rapid chip with an input/output device is disclosed. The bond pad is provided with a plurality of metal layers configurable for making a connection with the input/output device. The bond pad is then coupled to the input/output device with an interconnect structure. The method for electrically coupling the bond pad to the input/output device allows the customer to configure the power and ground pad counts after the slice is created.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.